Various methods for electrically connecting (i.e. attaching using an electrically-conductive bond to mechanically and electrically connect) unpackaged integrated circuits to printed circuit substrates are well known in the art. One such method uses "flip chips". A flip chip is an unpackaged integrated circuit chip whose bonding pads bear solder bumps which are substantially hemispherically-shaped solidified solder, typically made of a tin-lead composition. By unpackaged, we mean the flip chip has no plastic shell nor the metallic leads common in most integrated circuit packages. The active side of such a chip contains the active devices and bonding pads, and has a passivation layer that can protect its active components from environmental contaminants. The back side of such a chip, opposite to the active side, can contain markings indicating die part numbers and an electrical orientation for circuit application. The flip chips are so named because they are mounted with their active side facing down towards the circuit substrate.
One or more flip chips are electrically connected to a printed circuit substrate along with other electrical devices (e.g. resistors, capacitors) to form an electrical circuit. One or both sides of a printed circuit substrate can typically be used as an active side, which has an interconnection pattern of electrically conductive material (e.g. copper) in which to interconnect the various devices used in the circuit. For the purposes of flip chip attachment, the interconnection pattern has a number of contact pads defined thereon in connection footprints which correspond to the location and orientation of the solder bumps on a particular flip chip which may be attached to the printed circuit substrate. Of these contact pads, some are defined as active contact pads, each of which has a corresponding solder bump on a flip chip which is to be electrically connected to that active contact pad. Those contact pads which are not active pads are defined as inactive pads, which may or may not have corresponding solder bumps, and which are not functionally affected by an electrical connection process.
The most common use of flip chips is in connection with ceramic substrates containing interconnection patterns of palladium silver conductive traces. One method of connection used is controlled collapse chip connection (C-4) soldering, which involves registering the solder bumps of a flip chip on matching wettable solder contacts of the substrate, and then heating the solder to induce reflow and electrical connection between the chip and the substrate. By means of registration, we mean the placement of a flip chip on a substrate, such that each solder bump on the flip chip is located directly over its corresponding active contact pad, and such that the flip chip is in a position to be electrically connected without further movement of the flip chip or the substrate. The C-4 method is widely used, and has a significant advantage in that the shape of the solder bumps allows for the controlled collapse of a chip onto the substrate.
Ceramic substrates were first used with flip chips due to their ability to withstand a wider range of temperatures than other types of substrates. The C-4 method flip chip connection requires temperatures in excess of 320.degree. C. to reflow the tin-lead solder bumps, which is within the operating range of most ceramic substrates. Many other types of substrates, such as organic, fiberglass, film, etc. are unable to withstand these temperatures, and therefore can not be used with the C-4 method.
Also, ceramic substrates were typically used with flip chips because of the quality of the electrical connections. The thermal coefficients of expansion of a ceramic substrate (65.times.10.sup.-7 (.degree. /C.)) and silicon (30.times.10.sup.-7 (.degree. /C.)) are similar enough to reduce the formation of any damaging shear forces, during heating/cooling cycles, between the chip and the substrate which could fracture the interconnects. For example, the shear forces for a silicon flip chip connected to a ceramic substrate constructed of alumina are: EQU E.sub.substrate .times.(TCE.sub.substrate -TCE.sub.silicon die)=psi/.degree. C. EQU (37.times.10.sup.6 (psi)).times.(65.times.10.sup.-7 (.degree. /C.)-30.times.10.sup.-7 (.degree. /C.))=129.5 psi/.degree. C.
This property of the ceramic substrates then allows for circuits using flip chips on ceramic substrates to be used in a wider range of environments (e.g., an automotive operating environment, which may range from -65.degree. C. to 150.degree. C.) than circuits using other substrates. However, as the quality of electrical connections is always a significant concern for circuit board assemblies (especially those subject to harsh environments), improvement in the quality is a major goal when devising a new process.
Though ceramic substrates were initially the sole choice for use with flip chips, escalating assembly pricing pressures made ceramic a less desirable choice for a substrate, and a need developed for more cost-efficient types of substrates, which also have high temperature tolerance and thermal expansion properties similar to silicon. Of the possible alternative types of substrates, a flexible substrate incorporating polyimide film and copper foil laminates has a preferred combination of properties needed to meet the requirements for flip chip applications. In addition, the fact that this type of substrate is flexible provides additional advantages over ceramic substrates, in that the circuits may be constructed to fit in smaller areas or more specialized applications. However, such substrates have traditionally required an adhesive layer to bond the copper foil to the polyimide dielectric film.
The adhesives used have generally been a weak link in the substrate system. Adhesive properties make the assembly sensitive to adverse effects of solvents and moisture and can make the assembly too sticky or too soft under certain operating conditions. Most importantly, the adhesive in a circuit assembly can result in a limited range of operating temperatures, which is below what is required to reflow solder bumps, and which prohibits the use of the traditional C-4 soldering technique. The composition of the C-4 solder cannot be easily altered to lower the reflow temperature, because other properties of the solder, such as surface tension, would be changed, compelling major modifications to the manufacturing process for applying the solder bumps to the flip chips.
One attempt at a solution to this problem is disclosed in Legg et al., U.S. Pat. No. 4,967,950. The method uses a thermode heat probe in contact with the flip chip to heat the solder. Legg at al. describes a eutectic alloy "tinned" onto the substrate which is miscible with the solder bump, and which has a melting point which is lower than that of the solder bump and which is below the temperature at which degradation of the adhesive layer occurs. This alloy is "tinned" on the contact pads of the substrate in such a manner that the alloy is in contact with the solder bumps of a chip when the chip is in position to be electrically connected to the substrate. When the chip is heated to a temperature above the melting point of the eutectic alloy, but below the melting point of the solder or the degradation point of the adhesive, the alloy mixes with the solder such that the composition of the material at the interface of the solder and eutectic alloy is altered and the melting point of the molten interface mixture progressively increases. The chip is heated until the point at which the melting point of the mixture is higher than the temperature being maintained by the system. At this point, the mixture has solidified, and the chip is electrically connected to the substrate.
Though this improvement on the C-4 soldering technique overcomes the certain temperature related problems that exists with the traditional C-4 technique, a number of problems still exist which make this method less than desirable. First, the problems associated with flexible substrates utilizing adhesives to bond the copper foil to the polyimide film still exist. The operating temperature range of the assembly is still restricted, the assembly is still less resistant to solvents and moisture, and the assembly is still too sticky or too soft under certain operating conditions.
Secondly, the heating technique disclosed in Legg et al. introduces additional problems to the chip connection process. Chips are heated in the method by applying a thermode to the back side of each chip for a specified period of time. This method has the advantage of being able to apply uniform pressure to the back side of the chip, so as to ensure intimate contact of the solder bumps to the contact pads on the substrate. On the other hand, unnecessary thermal stress is induced on the chip, as heat is transmitted from the thermode directly to active devices on the chip. The heat must pass through the circuit before reaching the solder/alloy interface. Consequently, the tolerances and specifications of the chips used must be increased to allow them to withstand the increased thermal stress imposed by the thermode. Along with increased tolerances and specifications comes increased cost, so the method may be financially limiting for many applications.
Finally, using a thermode to heat individual chips can reduce productivity of the assembly process. The method requires a thermode to remain in fixed contact with each chip on a substrate for a time suitable to reflow the alloy and form an electrical connection of that chip to the substrate. For a typical printed circuit substrate having a large number of flip chips, the time to electrically connect all of the chips to the substrate can become significant. This has a tendency to decrease productivity, and consequently, increase the costs associated with the assembly process.
Many of the drawbacks to Legg et al. and the other prior art methods are therefore due to limitations of the substrates used. Many of the barriers imposed by these prior substrates on the prior art methods have been removed, however, by the introduction of adhesiveless flexible substrates. This advancement has opened the door for new methods which are not bound by the aforementioned substrate limitations.
One such adhesiveless flexible substrate is the Novaclad.RTM. adhesiveless copper/polymer film substrate, which has eliminated weaknesses that have plagued traditional adhesive-based substrate without sacrificing the desirable properties of a flexible circuit material. Such a substrate is the subject of U.S. Pat. No. 5,112,462 to Swisher, assigned to the assignee of the present application. It is essentially a polyimide or polyester film with copper interconnection layers located on one or both sides, joined without the use of adhesives. The Novaclad.RTM. substrate is produced by first exposing the polyester or polyimide film to a plasma comprising oxygen produced from a metallic electrode, which produces a metal-oxide treated film, and then forming the copper layers by a vacuum metalization process. The strength of the bond between the film and copper layers is primarily due to the formation of the metal-oxide on the film.
This adhesiveless flexible substrate allows the full thermal properties of the copper to be utilized. In addition, the adhesiveless flexible substrate is dimensionally stable as long as the thermal coefficient of expansion of the specific polyimide film used is carefully matched with that of copper. Finally, it overcomes the aforementioned limitations of ceramic and adhesive flexible substrates to provide an inexpensive, flexible substrate having a wide range of applications. Consequently, the need for a method of electrically connecting flip chips to a flexible substrate may be facilitated by the use of such an adhesiveless flexible substrate.